1. Field of the Invention
The present invention relates to a method for forming quantum dots in a semiconductor device and a semiconductor device resulting therefrom, and more particularly, to a method for forming quantum dots in a semiconductor device by utilizing agglomeration of a conductive layer or by utilizing simultaneous agglomeration and selective oxidation of the conductive layer and a semiconductor device resulting therefrom.
2. Discussion of the Related Art
The MOS structure is a basic structure of a semiconductor memory device. As limitations to this structure are detected with regard to device integration, development of a new semiconductor fabrication technology is needed for increasing a semiconductor memory device integration.
Specifically, when the semiconductor memory device has the MOS structure, the conventional method of switching based on variations of gate voltage may not be available, particularly when a semiconductor memory device has a device packing density within a 4 giga DRAM range because a distance between a source and a drain is reduced to about 0.13 xcexcm (S. Wolf, xe2x80x9cSilicon Processing; for the VLSI Eraxe2x80x9d, V2, chap.8). In other words, integration of the MOS structure is typically limited to about 4 giga DRAM because, if the distance between the source and drain becomes closer, malfunctions of the device may occur due to tunneling between the source and the drain and through a gate oxide film, even in the absence of a gate voltage. Therefore, in order to-fabricate a device of giga or tera class, a form of device other than the current MOS structure should be employed, a form of device that many research groups currently suggest is the SET(Single Electron Transistor)[see K. K. Likharev, IBM J. Res. Develop. 32(1) p144(1988)].
However, the following problems must be resolved for fabrication of the SET before it is used in place of a switching device such as a DRAM. First, in view of physical performance of the SET, a size of a quantum dot required for an SET cell should be below 10 nm or smaller to prevent errors caused by thermal vibration during operation of the cell. Therefore, at least a few nanometer quantum dot is required for allowing a room temperature operation of the SET.
Second, in addition to the above-described SET cell operation requirement, development of a process for forming quantum dots is required which allows an integration on a wafer of a size greater than 8 to 12 inches. Based on the results of current research, it can be known that the development is still at a stage at which the operation principle of the SET device is recognized. In other words, the development is still at a stage in which EBL(Electron Beam Lithography) and RIE(Reactive Ion Etching) are being used to form quantum dots. [K Nakazato, T. J. Thornton, J. White, and H. Ahmed, Appl. Phys. Lett. 61(26), 3145(1992)], [D. J. Paul, J. R. A. Cleaver, H. Ahmed, and T. E. Whall, Appl. Phys. Lett. 63(5), 631(1993)], [D. Ali and H. Ahmed, Appl. Phys. Lett. 64(16) 2119(1994)], [E. Leobandung, L. Guo, Y, Wang, and S. Y. Chou, Appl. Phys. Lett. 67(7), 938(1995)], [K. Nakazato, R. J. Blankie, and H. Ahmed, J. Appl. Phys. 75(10), 5123(1992)], [Y. Takahashi, M. Nagase, H. Namatus, K. Kurihara, K. Iwadate, Y. Nakajima, S. Horiguchi, K. Murase, and M. Tabe, IEDM 1994, p 936], and [E. Leobandung, L. Guo, and S. Y. Chou, IEDM 1995, p365].
Such a quantum dot may be applied in a memory device of the SET as well as in a light emitting device. The application in a light emitting device is made possible based on the principle that an energy band gap increases as a dimension of a material decreases, with subsequent decrease of a wave length of an emitted light. That is, if the same material is reduced to a nano-scale, the material emits light of a wave length different from a wave length of bulk. Utilizing the dependence of wave length of emitted light on the size of the material, a size of a quantum dot may be controlled to obtain light of a desired wave length. Such research is actively underway in mH-V semiconductor fields, which are typical light emitting materials. [D. Leonard, M. Krishnarnurthy, C. M. Reaves, and S. P. Denbaars, and P. M. Petroff, Appl. Phys. Lett. 63(23), 3203(1993)] and [O. I. Micic, J. Sprague, Z. Lu, and A. J. Nozik, Appl. Phys. Lett. 68(22), 3150(1996)]. For instance, there are reports that silicon Si or germanium Ge, which has an indirect gap, also emits a blue light when their size is reduced. By forming a quantum dot of such a silicon or germanium, application in a light emitting device is also possible. [Y. Kanemitsu, H. Uto, and Y. Masumoto, Appl. Phys. Lett. 61(18), 2187(1992)] and [H. Morisaki, H. Hashimoto, F. W. Ping, H. Nozawa, and H. Ono, J. Appl. Phys. 74(4), 2977(1993)].
When nano-scale quantum dots are used in the SET, the question of how the quantum dots should be distributed within a cell is basically dependent on a form of an SET structure to be used. Different forms of SET structures suggested until now may be sorted into two categories. In a first of these categories, SET structures are similar to the MOS structures in that they include a source, a drain and a gate formed together with a channel having the quantum dots which allow discrete flow of electrons. However, in this category of SET structure, the channel has an insulator and an array of multi-channel conductors(quantum dots), allowing discrete tunneling of electrons through the quantum dots, i.e., the channel has a form in which the quantum dots are embedded in the insulator[K. Nakazato, T. J. Thornton, J. White, and H. Ahmed, Appl. Phys. Lett. 61(26), 3145(1992)], [D. J. Paul, J. R. A. Cleaver, H. Ahmed, and T. E. Whall, Appl. Phys. Lett. 63(5), 631(1993)], [D. Ali and H. Ahmed, Appl. Phys. Lett. 67(7), 938(1995)], [K Nakazato, R. J. Blankie, and H. Ahmed, J. Appl. Phys. 75(10), 5123(1992)], [Y. Takahashi, M. Nagase, H. Namatsu, K. Kurihara, K. Iwadate, Y. Nakajima, S. Horiguchi, K. Murase, and M. Tabe, IEDM 1994, p 938], [E. Leobandung, L. Guo, and S. Y. Chou, IEDM 1995, p365], [O. I. Micic, H,.Sprague, Z. Lu, and A. J. Nozik, Appl. Phys. Lett. 68(22), 3150(1996)] and [D. V. Averin and K. K. Likaharev, in xe2x80x9cSingle Charging Tunnelingxe2x80x9d, edited by H. Grabert and M. H. Devoret (Plenum, N.Y., 1992) p311]. This represents the simplest structure required for transferring electrons by discrete tunneling. Although research verifies that the Coulomb blockade effect required for operating an SET cell is also provided even though the channel is formed with a two dimensional continuous conductive line through which electrons transfer[M. A. Kastner, Rev. Mod. Phys. 64(3), 849(1992)] and [R. A. Smith and H. Ahmed, J. Appl. Phys. 81(6), 2699(1997)], the surest way of inducing the discrete tunneling of electrons is of course providing quantum dots in an insulator.
The other category of SET structures also has a structure similar to the MOS structure, with a floating point quantum dot for charging electrons in the channel thereto for reducing a current flowing through the channel[S. Tiwari, F. Rana, H. Hanafi, A. Hartstein, E. F. Crabbe, and K. Chan, Appl. Phys. Lett. 68(10), 1377(1994)], [K. Yano, T, Ishii, T. Hashimoto, T. Kobayashi, F. Murai, and K. Seki, EEEE Trans. Electron Devices 41(9), 1628(1994)], and [A. Nakajima, T. Futatsugi, K. Kosemura, T. Fukano, and N. Yokoyama, Appl. Phys. Lett. 70(13), 1742(1997)]. This form of SET structure is similar to an EPROM(Electrically Programmable Read Only Memory) which utilizes a hot carrier effect reversely. Such a reduction of current shows a quantized change resulting from electron charging when a Coulomb blockade effect appears, where electrons that are charged in the quantum dots are used to prevent successive charging of further electrons. For this, a charging energy of a cell should be lower than a thermal energy of the cell, and a voltage drop caused by the charging should be large enough to be detected when used in a memory cell, for which a size of the quantum dot should be a few nano-meter range.
In either category of SET form, various disadvantages are experienced. First, a memory function of a device is operative only at a super low temperature, because the size of the quantum dots in the device is limited due to the technological limitation of EBL and RIE. Moreover, it is apparent that the formation of the quantum dots by EBL and RIE processes currently used is generally inappropriate for obtaining adequate through-put as well as integrating on a large sized wafer. Therefore, development of a quantum dot forming process which can be integrated on a large sized wafer and which can provide an adequate through-put, other than EBL and RIE process, is absolutely required for utilizing the SET as a next generation integrated circuit.
Second, when the quantum dots are used within a light emitting device, the size of the quantum dot should be controlled to obtain light of a desired wave length. If conditions require a size of the quantum dot in a range of a few nano-meter, that has not been developed, fabrication of product will fail.
The present invention is directed to a method for forming quantum dots in a semiconductor device that substantially obviates one or more of the above and other problems due to limitations and disadvantages of the related art, and a semiconductor device resulting therefrom.
An object of the present invention is to provide a method for forming quantum dots in a semiconductor device, in which uniform quantum dots having sizes as small or smaller than a few nano-meter can be formed for an application such as an SET cell as well as an optical application such as light emitting cell.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, the method for forming quantum dots in a seminconductor device, includes the steps of forming an insulating layer on a substrate, forming a conductive layer on the insulating layer, and annealing the conductive layer on the insulating layer to agglomerate the conductive layer.
In other aspect of the present invention, there is provided a method for forming quantum dots in a semiconductor device, including the steps of, forming a first insulating layer on a substrate, forming a conductive layer on the first insulating layer, forming a second insulating layer on the conductive layer, and annealing the conductive layer between the first, and second insulating layers to agglomerate the conductive layer.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed. Thus, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of example only. Various changes and modifications that are within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description. In fact, other objects, features and characteristics of the present invention; methods, operation, and functions of the related elements of the structure; combinations of parts; and economies of manufacture will surely become apparent from the following detailed description of the preferred embodiments and accompanying drawings, all of which form a part of this specification, wherein like reference numerals designate corresponding parts in various figures.